1. Field of the Invention
The present invention relates, in general, to a flexible circuit board for a ball grid array (BGA) semiconductor package having a die flag, more particularly, to a flexible circuit board for a BGA semiconductor package as a semiconductor paddle using a heat spreading and grounding solder ball pad.
2. Description of the Prior Art
As well known to those skilled in the art, BGA semiconductor packages have a configuration including a printed circuit board, at least one semiconductor chip mounted on one surface of the printed circuit board, and an array of solder balls attached to the other surface of the printed circuit board and adapted to electrically connect the semiconductor chip to a conductor such as a mother board. Such BGA semiconductor packages have been widely used as multi-pin devices having 200 pins or more, integrated circuits of very large scale integration (VLSI) and microprocessors.
Typically, printed circuit boards having a thickness of several hundred microns have been used as circuit boards for BGA semiconductor packages. Recently, flexible circuit boards, in which a circuit pattern is formed on a flexible film having a thickness of several ten microns, have been highlighted. This is because such flexible circuit boards are attributed to a thin and light structure of semiconductor packages. The flexible circuit boards also achieve an improvement in workability because it is unnecessary to form via holes. The flexible circuit boards also exhibit a low thermal resistivity.
FIG. 4A is a plan view illustrating a flexible circuit board having a conventional planar die flag. This die flag, which is denoted by the reference numeral 20', comprises a semiconductor chip paddle 30' having a square or rectangular shape, and a power bonding ring or strip 21. A plurality of solder ball pads 13 are formed on the outer portion of lower surface of the die flag 20' to fuse solder balls. A plurality of conductive traces 11 are also located at the outer portion of lower surface of the die flag 20'. Each conductive trace 11 is provided at one end thereof with a wire bonding finger 12 plated with gold. Grounding traces 24 are connected to the corners of the chip paddle 30' having a square or rectangular shape, respectively. A plurality of power signal transfer traces 22 are connected to the power bonding ring or strip 21.
FIG. 4B is a sectional view of a ball grid array semiconductor package using a flexible circuit board having the planar die flag structure of FIG. 4A. In FIG. 4B, elements respectively corresponding to those in FIG. 4A are denoted by the same reference numerals.
The flexible circuit board, which is denoted by the reference numeral 10', comprises a flexible resin film 14, and a printed circuit pattern formed on the upper surface of the flexible resin film 14. The printed circuit pattern includes a plurality of electric conductive traces 11. The flexible circuit board 10' also comprises a semiconductor chip paddle 30' having a square or rectangular shape and formed on the central portion of the flexible resin film 14 surround by the printed circuit pattern, and a ground bonding rim 23 formed on the flexible resin film 14 around the chip paddle 30'. The flexible resin film 14 is perforated by a chemical etching method to define a plurality of solder ball lands on the lower surface of the solder ball pad 13 for fusing the solder balls 5.
A metal frame 6 having a rectangular ring shape is bonded to the circuit board 10' by means of an adhesive layer 7 such as epoxy resin so that the flexible circuit board 10 is maintained in a rigid state with regard to the process efficiency. The metal frame 6 also serves as a heat spreader. A semiconductor chip 2 is mounted on the chip paddle 30' located at the central portion of the circuit board 10' by means of the adhesive layer 7. The metal frame 6 is disposed on the outer portion of the flexible circuit board 10' in such a manner that it surrounds the semiconductor chip 2. The semiconductor chip 2 has bond pads which are electrically connected with the power bonding ring 21 or wire bonding fingers 12 of the conductive traces 11 by bonding wires 3. The chip 2 and the bonding wires 3, etc. are protected from the environment by means of a resin envelope 4. The solder balls 5 as input/output terminals are fused on the solder ball pads 13 at the lower surface of the flexible circuit board 10' around the semiconductor chip paddle 30'.
The substrate of the chip paddle 30' is a copper layer. However, such a copper layer exhibits an insufficient bonding property to epoxy resin which is used to form the resin envelope. Therefore, a nickel layer is plated on the upper surface of the epoxy resin layer. In addition, an expensive gold layer is plated on the upper surface of the nickel layer.
In the flexible circuit board 10' having the above-mentioned conventional die flag structure, the manufacturing costs increases because the semiconductor chip paddle 30', which is comprised of a square or rectangular plane having a relatively large area, is plated with expensive gold. Furthermore, it is difficult to absorb mechanical stress generated due to a difference in thermal expansion coefficient between different materials of package elements when heat is generated during the operation of the semiconductor chip. As a result, a cracking or bending of the complete package may occur.
Therefore, when the package is mounted on a mother board, a poor connection or short circuit may occur because of a bad coplanarity of the solder balls resulting from the cracking or bending of the package. Furthermore, where the semiconductor chip (not shown) is depressively mounted on the chip paddle 30' after dispensing a silver-filled epoxy resin having a high thermal conductivity onto the semiconductor chip paddle 30', the epoxy resin may be non-uniformly spread on the semiconductor chip paddle 30'. In this case, a generation of voids may also occur. As a result, a peeling-off phenomenon may occur at the interface between the semiconductor chip and the circuit board 10'. Also, the epoxy resin may bleed out to the vicinity of the fingers of the grounding traces 24 connected to the bonding rim 23. In this case, the power bonding ring or strip 21, grounding traces 24 or conductive traces 11 may be short-circuited by the silver contained in the bled-out epoxy resin. In addition, a degraded wire bonding may occur.